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<a name="details" id="details"></a><h2 class="groupheader">Overview</h2>
<div class="textblock"><p>This header file contains the identifiers and low-level driver functions (or macros) that can be used to access the device. </p>
<p>High-level driver functions are defined in <a class="el" href="xhdmiphy1_8h.html">xhdmiphy1.h</a>.</p>
<dl class="section note"><dt>Note</dt><dd>None.</dd></dl>
<pre>
MODIFICATION HISTORY:</pre><pre>Ver   Who  Date     Changes
</p>
<hr/>
<p>
           dd/mm/yy
</p>
<hr/>
<p>
1.0   gm   10/12/18 Initial release.
</pre> </div><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga962d997981e2e284c3c9dd0e8a9a5752"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>(BaseAddress, RegOffset)&#160;&#160;&#160;XHdmiphy1_In32((BaseAddress) + (RegOffset))</td></tr>
<tr class="memdesc:ga962d997981e2e284c3c9dd0e8a9a5752"><td class="mdescLeft">&#160;</td><td class="mdescRight">This is a low-level function that reads from the specified register.  <a href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">More...</a><br/></td></tr>
<tr class="separator:ga962d997981e2e284c3c9dd0e8a9a5752"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9e65226a4b7cf835cf8555e84d895555"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>(BaseAddress, RegOffset, Data)&#160;&#160;&#160;XHdmiphy1_Out32((BaseAddress) + (RegOffset), (Data))</td></tr>
<tr class="memdesc:ga9e65226a4b7cf835cf8555e84d895555"><td class="mdescLeft">&#160;</td><td class="mdescRight">This is a low-level function that writes to the specified register.  <a href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">More...</a><br/></td></tr>
<tr class="separator:ga9e65226a4b7cf835cf8555e84d895555"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">HDMIPHY core registers: General registers.</div></td></tr>
<tr><td colspan="2"><div class="groupText"><p>Address mapping for the Video PHY core. </p>
</div></td></tr>
<tr class="memitem:ga189af8d011b364b664a7b0645e73a51a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga189af8d011b364b664a7b0645e73a51a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_VERSION_REG</b>&#160;&#160;&#160;0x000</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_BANK_SELECT_REG</b>&#160;&#160;&#160;0x00C</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_REG</b>&#160;&#160;&#160;0x010</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_RESET_REG</b>&#160;&#160;&#160;0x014</td></tr>
<tr class="separator:gaec13c032402e94c3adb52b31bb07341d"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_COMMON_INIT_REG</b>&#160;&#160;&#160;0x014</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_LOCK_STATUS_REG</b>&#160;&#160;&#160;0x018</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_INIT_REG</b>&#160;&#160;&#160;0x01C</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_INIT_STATUS_REG</b>&#160;&#160;&#160;0x020</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_INIT_REG</b>&#160;&#160;&#160;0x024</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_INIT_STATUS_REG</b>&#160;&#160;&#160;0x028</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_IBUFDS_GTXX_CTRL_REG</b>&#160;&#160;&#160;0x02C</td></tr>
<tr class="separator:gaf536d663bfec424c540a1cd522c5f5e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_POWERDOWN_CONTROL_REG</b>&#160;&#160;&#160;0x030</td></tr>
<tr class="separator:gade53cfc74a69cfea64dc463bbda2f3bc"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_LOOPBACK_CONTROL_REG</b>&#160;&#160;&#160;0x038</td></tr>
<tr class="separator:gafc2648e5738c6f8cd68a7b54b4ce8c6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">HDMIPHY core registers: Dynamic reconfiguration port (DRP) registers.</div></td></tr>
<tr class="memitem:gacadd55613dcc2705f4cedef2337c63d0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacadd55613dcc2705f4cedef2337c63d0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_CH1_REG</b>&#160;&#160;&#160;0x040</td></tr>
<tr class="separator:gacadd55613dcc2705f4cedef2337c63d0"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_CH2_REG</b>&#160;&#160;&#160;0x044</td></tr>
<tr class="separator:ga6a2d0637e62c0a6fddaa360d7081f9e5"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_CH3_REG</b>&#160;&#160;&#160;0x048</td></tr>
<tr class="separator:gafd0f4e636dce4bf28daded3d723f88a7"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_CH4_REG</b>&#160;&#160;&#160;0x04C</td></tr>
<tr class="separator:ga4b4513b035a74ccda69754ddbf611886"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_STATUS_CH1_REG</b>&#160;&#160;&#160;0x050</td></tr>
<tr class="separator:gab964671e5ea1ed07bdb63551bfa6d770"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_STATUS_CH2_REG</b>&#160;&#160;&#160;0x054</td></tr>
<tr class="separator:gaf246b9393c8092e6b5a4e132f167e9cd"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_STATUS_CH3_REG</b>&#160;&#160;&#160;0x058</td></tr>
<tr class="separator:gaadd719910c3a96028c5805b60dc8aea9"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_STATUS_CH4_REG</b>&#160;&#160;&#160;0x05C</td></tr>
<tr class="separator:ga83eb1458de28e3c6a4791523748c2d96"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_COMMON_REG</b>&#160;&#160;&#160;0x060</td></tr>
<tr class="separator:ga500ff1afc511575d681882ce14c9e730"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_STATUS_COMMON_REG</b>&#160;&#160;&#160;0x064</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_TXMMCM_REG</b>&#160;&#160;&#160;0x124</td></tr>
<tr class="separator:ga4b023fdb9b658c88fb0e5626b529b627"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_STATUS_TXMMCM_REG</b>&#160;&#160;&#160;0x128</td></tr>
<tr class="separator:ga6b37ddebf656d0691814822f1515ca7c"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_RXMMCM_REG</b>&#160;&#160;&#160;0x144</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_STATUS_RXMMCM_REG</b>&#160;&#160;&#160;0x148</td></tr>
<tr class="separator:gad507d00200c3e55fe41c0d4ff85925f7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">HDMIPHY core registers: CPLL Calibration registers.</div></td></tr>
<tr class="memitem:ga5e63115719a037fe2e3143d79846756f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5e63115719a037fe2e3143d79846756f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CPLL_CAL_PERIOD_REG</b>&#160;&#160;&#160;0x068</td></tr>
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<tr class="memitem:gaba2eac3c7b7f3bd75427f34e16d9d7bd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaba2eac3c7b7f3bd75427f34e16d9d7bd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CPLL_CAL_TOL_REG</b>&#160;&#160;&#160;0x06C</td></tr>
<tr class="separator:gaba2eac3c7b7f3bd75427f34e16d9d7bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">HDMIPHY core registers: GT Debug INTF registers.</div></td></tr>
<tr class="memitem:ga8866b52204638892e9de96cfd542e7e9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8866b52204638892e9de96cfd542e7e9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_GT_DBG_GPI_REG</b>&#160;&#160;&#160;0x068</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_GT_DBG_GPO_REG</b>&#160;&#160;&#160;0x06C</td></tr>
<tr class="separator:ga5e5f4d4f09f0b6889bdc9ecd7ebcd963"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">HDMIPHY core registers: Transmitter function registers.</div></td></tr>
<tr class="memitem:gad6c225d9f93ec0ae4125fafdf6ad4d3e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad6c225d9f93ec0ae4125fafdf6ad4d3e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_CONTROL_REG</b>&#160;&#160;&#160;0x070</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_BUFFER_BYPASS_REG</b>&#160;&#160;&#160;0x074</td></tr>
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<tr class="memitem:gab52a71c2cae90ae6a2cc5fcdba3b0efa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab52a71c2cae90ae6a2cc5fcdba3b0efa"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_STATUS_REG</b>&#160;&#160;&#160;0x078</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_CH12_REG</b>&#160;&#160;&#160;0x07C</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_CH34_REG</b>&#160;&#160;&#160;0x080</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_EXT_REG</b>&#160;&#160;&#160;0x084</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_RATE_CH12_REG</b>&#160;&#160;&#160;0x08C</td></tr>
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<tr class="memitem:gacfe7e880d9e1ebb1ab42cb9127550649"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacfe7e880d9e1ebb1ab42cb9127550649"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_RATE_CH34_REG</b>&#160;&#160;&#160;0x090</td></tr>
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<tr><td colspan="2"><div class="groupHeader">HDMIPHY core registers: Receiver function registers.</div></td></tr>
<tr class="memitem:gac9ff872959b7000db70e669ccdf2009f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac9ff872959b7000db70e669ccdf2009f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_RATE_CH12_REG</b>&#160;&#160;&#160;0x98</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_RATE_CH34_REG</b>&#160;&#160;&#160;0x9C</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_REG</b>&#160;&#160;&#160;0x100</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_STATUS_REG</b>&#160;&#160;&#160;0x104</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_EQ_CDR_REG</b>&#160;&#160;&#160;0x108</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_TDLOCK_REG</b>&#160;&#160;&#160;0x10C</td></tr>
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<tr><td colspan="2"><div class="groupHeader">HDMIPHY core registers: Interrupt registers.</div></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_EN_REG</b>&#160;&#160;&#160;0x110</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_DIS_REG</b>&#160;&#160;&#160;0x114</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_MASK_REG</b>&#160;&#160;&#160;0x118</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_STS_REG</b>&#160;&#160;&#160;0x11C</td></tr>
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<tr><td colspan="2"><div class="groupHeader">User clocking registers: MMCM and BUFGGT registers.</div></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_TXUSRCLK_CTRL_REG</b>&#160;&#160;&#160;0x0120</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_TXUSRCLK_REG1</b>&#160;&#160;&#160;0x0124</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_TXUSRCLK_REG2</b>&#160;&#160;&#160;0x0128</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_TXUSRCLK_REG3</b>&#160;&#160;&#160;0x012C</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_TXUSRCLK_REG4</b>&#160;&#160;&#160;0x0130</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_BUFGGT_TXUSRCLK_REG</b>&#160;&#160;&#160;0x0134</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MISC_TXUSRCLK_REG</b>&#160;&#160;&#160;0x0138</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_RXUSRCLK_CTRL_REG</b>&#160;&#160;&#160;0x0140</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_RXUSRCLK_REG1</b>&#160;&#160;&#160;0x0144</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_RXUSRCLK_REG2</b>&#160;&#160;&#160;0x0148</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_RXUSRCLK_REG3</b>&#160;&#160;&#160;0x014C</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_RXUSRCLK_REG4</b>&#160;&#160;&#160;0x0150</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_BUFGGT_RXUSRCLK_REG</b>&#160;&#160;&#160;0x0154</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MISC_RXUSRCLK_REG</b>&#160;&#160;&#160;0x0158</td></tr>
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<tr><td colspan="2"><div class="groupHeader">Clock detector (HDMI) registers.</div></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_CTRL_REG</b>&#160;&#160;&#160;0x0200</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_STAT_REG</b>&#160;&#160;&#160;0x0204</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_FREQ_TMR_TO_REG</b>&#160;&#160;&#160;0x0208</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_FREQ_TX_REG</b>&#160;&#160;&#160;0x020C</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_FREQ_RX_REG</b>&#160;&#160;&#160;0x0210</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_TMR_TX_REG</b>&#160;&#160;&#160;0x0214</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_TMR_RX_REG</b>&#160;&#160;&#160;0x0218</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_FREQ_DRU_REG</b>&#160;&#160;&#160;0x021C</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_FREQ_TX_FRL_REG</b>&#160;&#160;&#160;0x0230</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_FREQ_RX_FRL_REG</b>&#160;&#160;&#160;0x0234</td></tr>
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<tr><td colspan="2"><div class="groupHeader">Data recovery unit registers (HDMI).</div></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_CTRL_REG</b>&#160;&#160;&#160;0x0300</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_STAT_REG</b>&#160;&#160;&#160;0x0304</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_CFREQ_L_REG</b>(Ch)&#160;&#160;&#160;(0x0308 + (12 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_CFREQ_H_REG</b>(Ch)&#160;&#160;&#160;(0x030C + (12 * (Ch - 1)))</td></tr>
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<tr class="memitem:ga1741c886e49505cd3247c680ca7be55a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1741c886e49505cd3247c680ca7be55a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_GAIN_REG</b>(Ch)&#160;&#160;&#160;(0x0310 + (12 * (Ch - 1)))</td></tr>
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<tr><td colspan="2"><div class="groupHeader">TMDS Clock Pattern Generator registers (HDMI).</div></td></tr>
<tr class="memitem:gad0bf22209591a3a951f497c2b1890d5a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad0bf22209591a3a951f497c2b1890d5a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PATGEN_CTRL_REG</b>&#160;&#160;&#160;0x0340</td></tr>
<tr class="separator:gad0bf22209591a3a951f497c2b1890d5a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">HDMIPHY core masks, shifts, and register values.</div></td></tr>
<tr class="memitem:gab54d4cffc70ebfc28574d58d7965b3c2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gab54d4cffc70ebfc28574d58d7965b3c2">XHDMIPHY1_VERSION_INTER_REV_MASK</a>&#160;&#160;&#160;0x000000FF</td></tr>
<tr class="memdesc:gab54d4cffc70ebfc28574d58d7965b3c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Internal revision.  <a href="group__xhdmiphy1.html#gab54d4cffc70ebfc28574d58d7965b3c2">More...</a><br/></td></tr>
<tr class="separator:gab54d4cffc70ebfc28574d58d7965b3c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf9e55165fdb1fdf467dba14ad5755240"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gaf9e55165fdb1fdf467dba14ad5755240">XHDMIPHY1_VERSION_CORE_PATCH_MASK</a>&#160;&#160;&#160;0x00000F00</td></tr>
<tr class="memdesc:gaf9e55165fdb1fdf467dba14ad5755240"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core patch details.  <a href="group__xhdmiphy1.html#gaf9e55165fdb1fdf467dba14ad5755240">More...</a><br/></td></tr>
<tr class="separator:gaf9e55165fdb1fdf467dba14ad5755240"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab31e816466d00835f4835fecd3513cd0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gab31e816466d00835f4835fecd3513cd0">XHDMIPHY1_VERSION_CORE_PATCH_SHIFT</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:gab31e816466d00835f4835fecd3513cd0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for core patch details.  <a href="group__xhdmiphy1.html#gab31e816466d00835f4835fecd3513cd0">More...</a><br/></td></tr>
<tr class="separator:gab31e816466d00835f4835fecd3513cd0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3a16eb39f8a6cb000e6d5fcddbf04b6c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga3a16eb39f8a6cb000e6d5fcddbf04b6c">XHDMIPHY1_VERSION_CORE_VER_REV_MASK</a>&#160;&#160;&#160;0x0000F000</td></tr>
<tr class="memdesc:ga3a16eb39f8a6cb000e6d5fcddbf04b6c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core version revision.  <a href="group__xhdmiphy1.html#ga3a16eb39f8a6cb000e6d5fcddbf04b6c">More...</a><br/></td></tr>
<tr class="separator:ga3a16eb39f8a6cb000e6d5fcddbf04b6c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaefd13bfaf8d5cdf97e44d5479fc26c73"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gaefd13bfaf8d5cdf97e44d5479fc26c73">XHDMIPHY1_VERSION_CORE_VER_REV_SHIFT</a>&#160;&#160;&#160;12</td></tr>
<tr class="memdesc:gaefd13bfaf8d5cdf97e44d5479fc26c73"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for core version revision.  <a href="group__xhdmiphy1.html#gaefd13bfaf8d5cdf97e44d5479fc26c73">More...</a><br/></td></tr>
<tr class="separator:gaefd13bfaf8d5cdf97e44d5479fc26c73"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7ef7479579d49362a655572d14196e12"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga7ef7479579d49362a655572d14196e12">XHDMIPHY1_VERSION_CORE_VER_MNR_MASK</a>&#160;&#160;&#160;0x00FF0000</td></tr>
<tr class="memdesc:ga7ef7479579d49362a655572d14196e12"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core minor version.  <a href="group__xhdmiphy1.html#ga7ef7479579d49362a655572d14196e12">More...</a><br/></td></tr>
<tr class="separator:ga7ef7479579d49362a655572d14196e12"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga045bdbe9f1a6f88f1d320a4b462308de"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga045bdbe9f1a6f88f1d320a4b462308de">XHDMIPHY1_VERSION_CORE_VER_MNR_SHIFT</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:ga045bdbe9f1a6f88f1d320a4b462308de"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for core minor version.  <a href="group__xhdmiphy1.html#ga045bdbe9f1a6f88f1d320a4b462308de">More...</a><br/></td></tr>
<tr class="separator:ga045bdbe9f1a6f88f1d320a4b462308de"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf133797705643b5175c49aa1351a64f9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gaf133797705643b5175c49aa1351a64f9">XHDMIPHY1_VERSION_CORE_VER_MJR_MASK</a>&#160;&#160;&#160;0xFF000000</td></tr>
<tr class="memdesc:gaf133797705643b5175c49aa1351a64f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core major version.  <a href="group__xhdmiphy1.html#gaf133797705643b5175c49aa1351a64f9">More...</a><br/></td></tr>
<tr class="separator:gaf133797705643b5175c49aa1351a64f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3739592ccb4d12897a34189b354f0fca"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga3739592ccb4d12897a34189b354f0fca">XHDMIPHY1_VERSION_CORE_VER_MJR_SHIFT</a>&#160;&#160;&#160;24</td></tr>
<tr class="memdesc:ga3739592ccb4d12897a34189b354f0fca"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for core major version.  <a href="group__xhdmiphy1.html#ga3739592ccb4d12897a34189b354f0fca">More...</a><br/></td></tr>
<tr class="separator:ga3739592ccb4d12897a34189b354f0fca"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaa9602273316e4b4f4eab5a059531610"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaa9602273316e4b4f4eab5a059531610"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_BANK_SELECT_TX_MASK</b>&#160;&#160;&#160;0x00F</td></tr>
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<tr class="memitem:ga169a363a3c894069f1809c43ff42c43a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga169a363a3c894069f1809c43ff42c43a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_BANK_SELECT_RX_MASK</b>&#160;&#160;&#160;0xF00</td></tr>
<tr class="separator:ga169a363a3c894069f1809c43ff42c43a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9eac0cc4ba2ab8c6ff45d6dd26aeec5d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9eac0cc4ba2ab8c6ff45d6dd26aeec5d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_BANK_SELECT_RX_SHIFT</b>&#160;&#160;&#160;8</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_QPLL0_MASK</b>&#160;&#160;&#160;0x0000000F</td></tr>
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<tr class="memitem:gad261eb4f7c821b5355a6422bd886e047"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad261eb4f7c821b5355a6422bd886e047"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_CPLL_MASK</b>&#160;&#160;&#160;0x000000F0</td></tr>
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<tr class="memitem:ga2a5065dc359342507e917b4f2aad2831"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2a5065dc359342507e917b4f2aad2831"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_CPLL_SHIFT</b>&#160;&#160;&#160;4</td></tr>
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<tr class="memitem:ga2b1183b4e295a3b3fc42d90448ab256a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2b1183b4e295a3b3fc42d90448ab256a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_QPLL1_MASK</b>&#160;&#160;&#160;0x00000F00</td></tr>
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<tr class="memitem:gae3ff730e1cce48847fccf1f5065dabf1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae3ff730e1cce48847fccf1f5065dabf1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_QPLL1_SHIFT</b>&#160;&#160;&#160;8</td></tr>
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<tr class="memitem:gabec5c1e39a0b9b980c39968919617785"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabec5c1e39a0b9b980c39968919617785"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTREFCLK0</b>&#160;&#160;&#160;1</td></tr>
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<tr class="memitem:ga3c759deda306b9b431e6d10712579d38"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3c759deda306b9b431e6d10712579d38"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTREFCLK1</b>&#160;&#160;&#160;2</td></tr>
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<tr class="memitem:gaf784bd00b620fbd870a8fb2b1036592f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf784bd00b620fbd870a8fb2b1036592f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTNORTHREFCLK0</b>&#160;&#160;&#160;3</td></tr>
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<tr class="memitem:gafd24b80f95ddf6f8ddce193ab52a80c3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafd24b80f95ddf6f8ddce193ab52a80c3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTNORTHREFCLK1</b>&#160;&#160;&#160;4</td></tr>
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<tr class="memitem:gac23988f503767b0bf04a7297a15dc60f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac23988f503767b0bf04a7297a15dc60f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTSOUTHREFCLK0</b>&#160;&#160;&#160;5</td></tr>
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<tr class="memitem:ga160410d910b99556cfb50f437e672c25"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga160410d910b99556cfb50f437e672c25"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTSOUTHREFCLK1</b>&#160;&#160;&#160;6</td></tr>
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<tr class="memitem:ga4dfc5f909b955eae9b18a23bca995b0f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4dfc5f909b955eae9b18a23bca995b0f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTEASTREFCLK0</b>&#160;&#160;&#160;3</td></tr>
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<tr class="memitem:ga9f5a44b0fc56f44a50190051c2274c7b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9f5a44b0fc56f44a50190051c2274c7b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTEASTREFCLK1</b>&#160;&#160;&#160;4</td></tr>
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<tr class="memitem:ga34f51cf6c7775f0dc93f1d8861827880"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga34f51cf6c7775f0dc93f1d8861827880"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTWESTREFCLK0</b>&#160;&#160;&#160;5</td></tr>
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<tr class="memitem:gaab06cbb0552823a42da069d7567d8718"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaab06cbb0552823a42da069d7567d8718"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTWESTREFCLK1</b>&#160;&#160;&#160;6</td></tr>
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<tr class="memitem:ga2b4f9adaeb006b3d039f75bb664ae58f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2b4f9adaeb006b3d039f75bb664ae58f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTGREFCLK</b>&#160;&#160;&#160;7</td></tr>
<tr class="separator:ga2b4f9adaeb006b3d039f75bb664ae58f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaff3d957c80e03bb4b6cbe586dded467d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaff3d957c80e03bb4b6cbe586dded467d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_SYSCLKSEL_MASK</b>&#160;&#160;&#160;0x0F000000</td></tr>
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<tr class="memitem:ga0709f51c5f40f26b0be87bb0a75bce16"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0709f51c5f40f26b0be87bb0a75bce16"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_SYSCLKSEL_SHIFT</b>&#160;&#160;&#160;24</td></tr>
<tr class="separator:ga0709f51c5f40f26b0be87bb0a75bce16"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4fc1a4865a5505e89dff0c72061b8e8b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4fc1a4865a5505e89dff0c72061b8e8b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XXSYSCLKSEL_DATA_PLL0</b>&#160;&#160;&#160;0</td></tr>
<tr class="separator:ga4fc1a4865a5505e89dff0c72061b8e8b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga477aa64102dbb6b52eb558cd03ce3f22"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga477aa64102dbb6b52eb558cd03ce3f22"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XXSYSCLKSEL_DATA_PLL1</b>&#160;&#160;&#160;1</td></tr>
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<tr class="memitem:gaec40f9e7ac36ea10ff801bc9e8b73995"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaec40f9e7ac36ea10ff801bc9e8b73995"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XXSYSCLKSEL_DATA_CPLL</b>&#160;&#160;&#160;0</td></tr>
<tr class="separator:gaec40f9e7ac36ea10ff801bc9e8b73995"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafca1d4550ad35dbf0ee564e9334334f3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafca1d4550ad35dbf0ee564e9334334f3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XXSYSCLKSEL_DATA_QPLL</b>&#160;&#160;&#160;1</td></tr>
<tr class="separator:gafca1d4550ad35dbf0ee564e9334334f3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga632b294c3a4a91bc74aaa930fb5550a3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga632b294c3a4a91bc74aaa930fb5550a3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XXSYSCLKSEL_DATA_QPLL0</b>&#160;&#160;&#160;3</td></tr>
<tr class="separator:ga632b294c3a4a91bc74aaa930fb5550a3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadc7d2d0d55264bde7ab16f5a79aa9276"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadc7d2d0d55264bde7ab16f5a79aa9276"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XXSYSCLKSEL_DATA_QPLL1</b>&#160;&#160;&#160;2</td></tr>
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<tr class="memitem:ga68250145f626bef83db01c08fd0943ca"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga68250145f626bef83db01c08fd0943ca"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XXSYSCLKSEL_OUT_CH</b>&#160;&#160;&#160;0</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XXSYSCLKSEL_OUT_CMN</b>&#160;&#160;&#160;1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XXSYSCLKSEL_OUT_CMN0</b>&#160;&#160;&#160;2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XXSYSCLKSEL_OUT_CMN1</b>&#160;&#160;&#160;3</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_RXSYSCLKSEL_OUT_MASK</b>(G)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_TXSYSCLKSEL_OUT_MASK</b>(G)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_RXSYSCLKSEL_DATA_MASK</b>(G)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_TXSYSCLKSEL_DATA_MASK</b>(G)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_RXSYSCLKSEL_OUT_SHIFT</b>(G)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_TXSYSCLKSEL_OUT_SHIFT</b>(G)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_RXSYSCLKSEL_DATA_SHIFT</b>(G)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_TXSYSCLKSEL_DATA_SHIFT</b>(G)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_RESET_CPLL_MASK</b>&#160;&#160;&#160;0x1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_RESET_QPLL0_MASK</b>&#160;&#160;&#160;0x2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_RESET_QPLL1_MASK</b>&#160;&#160;&#160;0x4</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_GTWIZ_RESET_ALL_MASK</b>&#160;&#160;&#160;0x1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PCIERST_ALL_CH_MASK</b>&#160;&#160;&#160;0x2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_LOCK_STATUS_CPLL_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (Ch - 1))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_LOCK_STATUS_QPLL0_MASK</b>&#160;&#160;&#160;0x10</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_LOCK_STATUS_QPLL1_MASK</b>&#160;&#160;&#160;0x20</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_LOCK_STATUS_CPLL_ALL_MASK</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_LOCK_STATUS_CPLL_HDMI_MASK</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_LOCK_STATUS_RPLL_MASK</b>&#160;&#160;&#160;0xC0</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_LOCK_STATUS_LCPLL_MASK</b>&#160;&#160;&#160;0x300</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_GTRESET_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_PMARESET_MASK</b>(Ch)&#160;&#160;&#160;(0x02 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_PCSRESET_MASK</b>(Ch)&#160;&#160;&#160;(0x04 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_INIT_USERRDY_MASK</b>(Ch)&#160;&#160;&#160;(0x08 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_LNKRDY_SB_MASK</b>(Ch)&#160;&#160;&#160;(0x10 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_MSTRESET_MASK</b>(Ch)&#160;&#160;&#160;(0x20 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_INIT_USERRDY_MASK</b>(Ch)&#160;&#160;&#160;(0x40 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_PLLGTRESET_MASK</b>(Ch)&#160;&#160;&#160;(0x80 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_GTRESET_ALL_MASK</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_LNKRDY_SB_ALL_MASK</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_MSTRESET_ALL_MASK</b></td></tr>
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<tr class="memitem:gac7525834f8d093a43e25d5a2812ad6e0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac7525834f8d093a43e25d5a2812ad6e0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_INIT_USERRDY_ALL_MASK</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_INIT_USERRDY_ALL_MASK</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_PLLGTRESET_ALL_MASK</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_STATUS_RESETDONE_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_STATUS_PMARESETDONE_MASK</b>(Ch)&#160;&#160;&#160;(0x02 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_STATUS_POWERGOOD_MASK</b>(Ch)&#160;&#160;&#160;(0x04 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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<tr class="memitem:ga9e19d3196f2f542baef5e0527135e215"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9e19d3196f2f542baef5e0527135e215"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_STATUS_RESETDONE_ALL_MASK</b></td></tr>
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<tr class="memitem:gad13ba250e5be855db3904f3261a49c23"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad13ba250e5be855db3904f3261a49c23"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_STATUS_PMARESETDONE_ALL_MASK</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_IBUFDS_GTXX_CTRL_GTREFCLK0_CEB_MASK</b>&#160;&#160;&#160;0x1</td></tr>
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<tr class="memitem:ga767401923ba72379f3a875c04eaeabda"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga767401923ba72379f3a875c04eaeabda"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_IBUFDS_GTXX_CTRL_GTREFCLK1_CEB_MASK</b>&#160;&#160;&#160;0x2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_POWERDOWN_CONTROL_CPLLPD_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_POWERDOWN_CONTROL_QPLL0PD_MASK</b>(Ch)&#160;&#160;&#160;(0x02 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_POWERDOWN_CONTROL_QPLL1PD_MASK</b>(Ch)&#160;&#160;&#160;(0x04 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_POWERDOWN_CONTROL_RXPD_MASK</b>(Ch)&#160;&#160;&#160;(0x18 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_POWERDOWN_CONTROL_RXPD_SHIFT</b>(Ch)&#160;&#160;&#160;(3 + (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_POWERDOWN_CONTROL_TXPD_MASK</b>(Ch)&#160;&#160;&#160;(0x60 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_POWERDOWN_CONTROL_TXPD_SHIFT</b>(Ch)&#160;&#160;&#160;(5 + (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_LOOPBACK_CONTROL_CH_MASK</b>(Ch)&#160;&#160;&#160;(0x03 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_LOOPBACK_CONTROL_CH_SHIFT</b>(Ch)&#160;&#160;&#160;(8 * (Ch - 1))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_DRPADDR_MASK</b>&#160;&#160;&#160;0x00000FFF</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_DRPEN_MASK</b>&#160;&#160;&#160;0x00001000</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_DRPWE_MASK</b>&#160;&#160;&#160;0x00002000</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_DRPRESET_MASK</b>&#160;&#160;&#160;0x00004000</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_DRPDI_MASK</b>&#160;&#160;&#160;0xFFFF0000</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_DRPDI_SHIFT</b>&#160;&#160;&#160;16</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_STATUS_DRPO_MASK</b>&#160;&#160;&#160;0x0FFFF</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_STATUS_DRPRDY_MASK</b>&#160;&#160;&#160;0x10000</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_STATUS_DRPBUSY_MASK</b>&#160;&#160;&#160;0x20000</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CPLL_CAL_PERIOD_MASK</b>&#160;&#160;&#160;0x3FFFF</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CPLL_CAL_TOL_MASK</b>&#160;&#160;&#160;0x3FFFF</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_GPI_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (Ch - 1))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_GPI_MASK</b>(Ch)&#160;&#160;&#160;(0x10 &lt;&lt; (Ch - 1))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_GPO_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (Ch - 1))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_GPO_MASK_ALL</b>(NCh)&#160;&#160;&#160;((NCh == 3) ? 0x7 : 0xF)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_GPO_SHIFT</b>&#160;&#160;&#160;0</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_GPO_MASK</b>(Ch)&#160;&#160;&#160;(0x10 &lt;&lt; (Ch - 1))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_GPO_MASK_ALL</b>(NCh)&#160;&#160;&#160;((NCh == 3) ? 0x70 : 0xF0)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_GPO_SHIFT</b>&#160;&#160;&#160;4</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_CONTROL_TX8B10BEN_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_CONTROL_TX8B10BEN_ALL_MASK</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_CONTROL_TXPOLARITY_MASK</b>(Ch)&#160;&#160;&#160;(0x02 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_CONTROL_TXPOLARITY_ALL_MASK</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_CONTROL_TXPRBSSEL_MASK</b>(Ch)&#160;&#160;&#160;(0x5C &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_CONTROL_TXPRBSSEL_ALL_MASK</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_CONTROL_TXPRBSSEL_SHIFT</b>(Ch)&#160;&#160;&#160;(2 + (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_CONTROL_TXPRBSFORCEERR_MASK</b>(Ch)&#160;&#160;&#160;(0x20 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_CONTROL_TXPRBSFORCEERR_ALL_MASK</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_BUFFER_BYPASS_TXPHDLYRESET_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_BUFFER_BYPASS_TXPHALIGN_MASK</b>(Ch)&#160;&#160;&#160;(0x02 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_BUFFER_BYPASS_TXPHALIGNEN_MASK</b>(Ch)&#160;&#160;&#160;(0x04 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_BUFFER_BYPASS_TXPHDLYPD_MASK</b>(Ch)&#160;&#160;&#160;(0x08 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_BUFFER_BYPASS_TXPHINIT_MASK</b>(Ch)&#160;&#160;&#160;(0x10 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_BUFFER_BYPASS_TXDLYRESET_MASK</b>(Ch)&#160;&#160;&#160;(0x20 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_BUFFER_BYPASS_TXDLYBYPASS_MASK</b>(Ch)&#160;&#160;&#160;(0x40 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_BUFFER_BYPASS_TXDLYEN_MASK</b>(Ch)&#160;&#160;&#160;(0x80 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_STATUS_TXPHALIGNDONE_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_STATUS_TXPHINITDONE_MASK</b>(Ch)&#160;&#160;&#160;(0x02 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_STATUS_TXDLYRESETDONE_MASK</b>(Ch)&#160;&#160;&#160;(0x04 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_STATUS_TXBUFSTATUS_MASK</b>(Ch)&#160;&#160;&#160;(0x18 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_STATUS_TXBUFSTATUS_SHIFT</b>(Ch)&#160;&#160;&#160;(3 + (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_TXDIFFCTRL_MASK</b>(Ch)&#160;&#160;&#160;(0x000F &lt;&lt; (16 * ((Ch - 1) % 2)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_TXDIFFCTRL_SHIFT</b>(Ch)&#160;&#160;&#160;(16 * ((Ch - 1) % 2))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_TXELECIDLE_MASK</b>(Ch)&#160;&#160;&#160;(0x0010 &lt;&lt; (16 * ((Ch - 1) % 2)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_TXELECIDLE_SHIFT</b>(Ch)&#160;&#160;&#160;(4 + (16 * ((Ch - 1) % 2)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_TXINHIBIT_MASK</b>(Ch)&#160;&#160;&#160;(0x0020 &lt;&lt; (16 * ((Ch - 1) % 2)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_TXINHIBIT_SHIFT</b>(Ch)&#160;&#160;&#160;(5 + (16 * ((Ch - 1) % 2)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_TXPOSTCURSOR_MASK</b>(Ch)&#160;&#160;&#160;(0x07C0 &lt;&lt; (16 * ((Ch - 1) % 2)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_TXPOSTCURSOR_SHIFT</b>(Ch)&#160;&#160;&#160;(6 + (16 * ((Ch - 1) % 2)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_TXPRECURSOR_MASK</b>(Ch)&#160;&#160;&#160;(0xF800 &lt;&lt; (16 * ((Ch - 1) % 2)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_TXPRECURSOR_SHIFT</b>(Ch)&#160;&#160;&#160;(11 + (16 * ((Ch - 1) % 2)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_EXT_TXDIFFCTRL_MASK</b>(Ch)&#160;&#160;&#160;(0x0001 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_EXT_TXDIFFCTRL_SHIFT</b>(Ch)&#160;&#160;&#160;(8 * (Ch - 1))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_RATE_MASK</b>(Ch)&#160;&#160;&#160;(0x00FF &lt;&lt; (16 * ((Ch - 1) % 2)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_RATE_SHIFT</b>(Ch)&#160;&#160;&#160;(16 * ((Ch - 1) % 2))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_RATE_MASK</b>(Ch)&#160;&#160;&#160;(0x00FF &lt;&lt; (16 * ((Ch - 1) % 2)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_RATE_SHIFT</b>(Ch)&#160;&#160;&#160;(16 * ((Ch - 1) % 2))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_RX8B10BEN_MASK</b>(Ch)&#160;&#160;&#160;(0x02 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_RX8B10BEN_ALL_MASK</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_RXPOLARITY_MASK</b>(Ch)&#160;&#160;&#160;(0x04 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_RXPOLARITY_ALL_MASK</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_RXPRBSCNTRESET_MASK</b>(Ch)&#160;&#160;&#160;(0x08 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_RXPRBSSEL_MASK</b>(Ch)&#160;&#160;&#160;(0xF0 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_RXPRBSSEL_ALL_MASK</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_RXPRBSSEL_SHIFT</b>(Ch)&#160;&#160;&#160;(4 + (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_STATUS_RXCDRLOCK_MASK</b>(Ch)&#160;&#160;&#160;(0x1 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_STATUS_RXBUFSTATUS_MASK</b>(Ch)&#160;&#160;&#160;(0xE &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_STATUS_RXBUFSTATUS_SHIFT</b>(Ch)&#160;&#160;&#160;(1 + (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_RXLPMEN_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_STATUS_RXCDRHOLD_MASK</b>(Ch)&#160;&#160;&#160;(0x02 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_STATUS_RXOSOVRDEN_MASK</b>(Ch)&#160;&#160;&#160;(0x04 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_STATUS_RXLPMLFKLOVRDEN_MASK</b>(Ch)&#160;&#160;&#160;(0x08 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_STATUS_RXLPMHFOVRDEN_MASK</b>(Ch)&#160;&#160;&#160;(0x10 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_RXLPMEN_ALL_MASK</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_TXRESETDONE_MASK</b>&#160;&#160;&#160;0x00000001</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_RXRESETDONE_MASK</b>&#160;&#160;&#160;0x00000002</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_CPLL_LOCK_MASK</b>&#160;&#160;&#160;0x00000004</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_QPLL0_LOCK_MASK</b>&#160;&#160;&#160;0x00000008</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_LCPLL_LOCK_MASK</b>&#160;&#160;&#160;0x00000008</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_TXALIGNDONE_MASK</b>&#160;&#160;&#160;0x00000010</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_QPLL1_LOCK_MASK</b>&#160;&#160;&#160;0x00000020</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_RPLL_LOCK_MASK</b>&#160;&#160;&#160;0x00000020</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_TXCLKDETFREQCHANGE_MASK</b>&#160;&#160;&#160;0x00000040</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_RXCLKDETFREQCHANGE_MASK</b>&#160;&#160;&#160;0x00000080</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_TXMMCMUSRCLK_LOCK_MASK</b>&#160;&#160;&#160;0x00000200</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_RXMMCMUSRCLK_LOCK_MASK</b>&#160;&#160;&#160;0x00000400</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_TXGPO_RE_MASK</b>&#160;&#160;&#160;0x00000800</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_RXGPO_RE_MASK</b>&#160;&#160;&#160;0x00001000</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_TXTMRTIMEOUT_MASK</b>&#160;&#160;&#160;0x40000000</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_RXTMRTIMEOUT_MASK</b>&#160;&#160;&#160;0x80000000</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_QPLL_LOCK_MASK</b>&#160;&#160;&#160;XHDMIPHY1_INTR_QPLL0_LOCK_MASK</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_CTRL_CFG_NEW_MASK</b>&#160;&#160;&#160;0x01</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_CTRL_RST_MASK</b>&#160;&#160;&#160;0x02</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_CTRL_CFG_SUCCESS_MASK</b>&#160;&#160;&#160;0x10</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_CTRL_LOCKED_MASK</b>&#160;&#160;&#160;0x200</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_CTRL_PWRDWN_MASK</b>&#160;&#160;&#160;0x400</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_CTRL_LOCKED_MASK_MASK</b>&#160;&#160;&#160;0x800</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_CTRL_CLKINSEL_MASK</b>&#160;&#160;&#160;0x1000</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_REG1_DIVCLK_MASK</b>&#160;&#160;&#160;0x00000FF</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_REG1_CLKFBOUT_MULT_MASK</b>&#160;&#160;&#160;0x000FF00</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_REG1_CLKFBOUT_MULT_SHIFT</b>&#160;&#160;&#160;8</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_REG1_CLKFBOUT_FRAC_MASK</b>&#160;&#160;&#160;0x3FF0000</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_REG1_CLKFBOUT_FRAC_SHIFT</b>&#160;&#160;&#160;16</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_REG2_DIVCLK_MASK</b>&#160;&#160;&#160;0x00000FF</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_REG2_CLKOUT0_FRAC_MASK</b>&#160;&#160;&#160;0x3FF0000</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_REG2_CLKOUT0_FRAC_SHIFT</b>&#160;&#160;&#160;16</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_REG34_DIVCLK_MASK</b>&#160;&#160;&#160;0x00000FF</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_BUFGGT_XXUSRCLK_CLR_MASK</b>&#160;&#160;&#160;0x1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_BUFGGT_XXUSRCLK_DIV_MASK</b>&#160;&#160;&#160;0xE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_BUFGGT_XXUSRCLK_DIV_SHIFT</b>&#160;&#160;&#160;1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MISC_XXUSRCLK_CKOUT1_OEN_MASK</b>&#160;&#160;&#160;0x1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MISC_XXUSRCLK_REFCLK_CEB_MASK</b>&#160;&#160;&#160;0x2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_CTRL_RUN_MASK</b>&#160;&#160;&#160;0x1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_CTRL_TX_TMR_CLR_MASK</b>&#160;&#160;&#160;0x2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_CTRL_RX_TMR_CLR_MASK</b>&#160;&#160;&#160;0x4</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_CTRL_TX_FREQ_RST_MASK</b>&#160;&#160;&#160;0x8</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_CTRL_RX_FREQ_RST_MASK</b>&#160;&#160;&#160;0x10</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_CTRL_FREQ_LOCK_THRESH_MASK</b>&#160;&#160;&#160;0x1FE0</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_CTRL_FREQ_LOCK_THRESH_SHIFT</b>&#160;&#160;&#160;5</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_CTRL_ACCURACY_RANGE_MASK</b>&#160;&#160;&#160;0x1E000</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_CTRL_ACCURACY_RANGE_SHIFT</b>&#160;&#160;&#160;13</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_STAT_TX_FREQ_ZERO_MASK</b>&#160;&#160;&#160;0x1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_STAT_RX_FREQ_ZERO_MASK</b>&#160;&#160;&#160;0x2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_STAT_TX_REFCLK_LOCK_MASK</b>&#160;&#160;&#160;0x3</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_STAT_TX_REFCLK_LOCK_CAP_MASK</b>&#160;&#160;&#160;0x4</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_CTRL_RST_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_CTRL_EN_MASK</b>(Ch)&#160;&#160;&#160;(0x02 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_STAT_ACTIVE_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (8 * (Ch - 1)))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_STAT_VERSION_MASK</b>&#160;&#160;&#160;0xFF000000</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_STAT_VERSION_SHIFT</b>&#160;&#160;&#160;24</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_CFREQ_H_MASK</b>&#160;&#160;&#160;0x1F</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_GAIN_G1_MASK</b>&#160;&#160;&#160;0x00001F</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_GAIN_G1_SHIFT</b>&#160;&#160;&#160;0</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_GAIN_G1_P_MASK</b>&#160;&#160;&#160;0x001F00</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_GAIN_G1_P_SHIFT</b>&#160;&#160;&#160;8</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_GAIN_G2_MASK</b>&#160;&#160;&#160;0x1F0000</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_GAIN_G2_SHIFT</b>&#160;&#160;&#160;16</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PATGEN_CTRL_ENABLE_MASK</b>&#160;&#160;&#160;0x80000000</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PATGEN_CTRL_ENABLE_SHIFT</b>&#160;&#160;&#160;31</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PATGEN_CTRL_RATIO_MASK</b>&#160;&#160;&#160;0x7</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PATGEN_CTRL_RATIO_SHIFT</b>&#160;&#160;&#160;0</td></tr>
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<tr><td colspan="2"><div class="groupHeader">Register access macro definitions.</div></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHdmiphy1_In32</b>&#160;&#160;&#160;Xil_In32</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHdmiphy1_Out32</b>&#160;&#160;&#160;Xil_Out32</td></tr>
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